課程資訊
課程名稱
積體電路量產可行性設計
VLSI Design for Manufacturability 
開課學期
100-2 
授課對象
電機資訊學院  電機工程學研究所  
授課教師
蔡坤諭 
課號
EE5119 
課程識別碼
921 U7210 
班次
 
學分
全/半年
半年 
必/選修
選修 
上課時間
星期四6,7,8(13:20~16:20) 
上課地點
明達203 
備註
總人數上限:15人 
課程簡介影片
 
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課程概述

[Course description]
Design for manufacturability (DFM) is the general engineering art of designing products in such a way that they are easy to manufacture, and function as expected. Achieving high-yield and high-performance designs utilizing state-of-the-art nanoscale integrated-circuit (IC) process technology has become an extremely challenging task due to the feature miniaturization and complexity growth trend following Moore's law. DFM includes a set of techniques to modify the IC designs in order to make them more manufacturable, to improve their functional yield, parametric yield, or reliability. This introductory course focuses equally on modeling, simulation, and design aspects of the subject. Students will get exposure to important physical concepts and mathematical skills for process variation modeling, circuit performance variation modeling, and robust design methods to minimize the variations. They are encouraged to develop and/or utilize some simulation tools, and integrate the concepts and knowledge learned within their final projects. 

課程目標
[Course Outline]
1. Moore's Law
2. Nano-CMOS Devices, Processes, and Variability
3. Lithography: Equipment, Processes, and Trends
4. Lithography: Modeling and Simulation
5. Lithography: Patterning Enhancement Techniques (OPC, PSM, MP, etc.)
6. Lithography: Patterning Variation Modeling, Patterning Hotspot Detection and Correction
7. Chemical-Mechanical Planarization: Equipment and Processes, Modeling and Simulation, and Design Aspects
8. Interconnects
9. DFM: Layout-level Design Aspects
10. DFM: Circuit-level Design Aspects* 
課程要求
[Prerequisites]
Undergraduate Electronics; Signals and Systems or Control Systems; basic concepts of IC design and manufacturing flows 
預期每週課後學習時數
 
Office Hours
另約時間 備註: (Meeting appointment: Ms. Yi-Ru Chen dioduo@cc.ee.ntu.edu.tw (02) 33669638) 
指定閱讀
Lecture material, assigned reference papers 
參考書目
[Reference material (partial list)]
1. A. K-K Wong, Resolution Enhancement Techniques in Optical Lithography, SPIE
Press, 2001
2. L. Scheffer, L. Lavagno, and G. Martin, EDA for IC Implementation, Circuit
Design, and Process Technology, CRC, 2006
3. C. Chiang and J. Kawa, Design for Manufacturability and Yield for Nano-
Scale CMOS, Springer, 2007  
評量方式
(僅供參考)
 
No.
項目
百分比
說明
1. 
Final project  
50% 
Proposal, presentation, and report  
2. 
Final exam  
50% 
Based on course material and homework assignments  
3. 
Homework  
0% 
Self-study. Submission not required. 
 
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週次
日期
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